Open AccessFPGA BASED HIGHLY RELIABLE FAULT TOLERANT APPROACH FOR NETWORK ON CHIP(NOC)
Author(s) -
Jehosheba Margaret.M .
Publication year - 2014
Publication title -
international journal of research in engineering and technology
Language(s) - English
Resource type - Journals
eISSN - 2321-7308
pISSN - 2319-1163
DOI - 10.15623/ijret.2014.0314005
Subject(s) - field programmable gate array , network on a chip , embedded system , computer science , chip , computer architecture , fault (geology) , reliability engineering , engineering , telecommunications , geology , seismology