Open AccessHIGH PERFORMANCE NOVEL DUAL STACK GATING TECHNIQUE FOR REDUCTION OF GROUND BOUNCE
Author(s) -
K. Ramakrishna Rao
Publication year - 2013
Publication title -
international journal of research in engineering and technology
Language(s) - English
Resource type - Journals
eISSN - 2321-7308
pISSN - 2319-1163
DOI - 10.15623/ijret.2013.0208043
Subject(s) - stack (abstract data type) , reduction (mathematics) , dual (grammatical number) , gating , ground bounce , computer science , materials science , environmental science , engineering , electrical engineering , mathematics , psychology , neuroscience , voltage , transistor , art , geometry , literature , gate dielectric , programming language