z-logo
open-access-imgOpen Access
A LOW POWER ADDER USING REVERSIBLE LOGIC GATES
Author(s) -
T. Nagababu .
Publication year - 2012
Publication title -
international journal of research in engineering and technology
Language(s) - Uncategorized
Resource type - Journals
eISSN - 2321-7308
pISSN - 2319-1163
DOI - 10.15623/ijret.2012.0103007
Subject(s) - adder , power (physics) , arithmetic , logic gate , electrical engineering , computer science , pass transistor logic , electronic engineering , mathematics , engineering , physics , electronic circuit , digital electronics , thermodynamics , cmos

The content you want is available to Zendy users.

Already have an account? Click here to sign in.
Having issues? You can contact us here
Accelerating Research

Address

John Eccles House
Robert Robinson Avenue,
Oxford Science Park, Oxford
OX4 4GP, United Kingdom