Open AccessDesign of an Efficient Parallel Comparator Architecture for Low Power Delay Product
Author(s) -
Mangal Deep Gupta,
R. K. Chauhan
Publication year - 2021
Publication title -
advances in electrical and electronic engineering
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.225
H-Index - 19
eISSN - 1804-3119
pISSN - 1336-1376
DOI - 10.15598/aeee.v19i2.4101
Subject(s) - comparator , multiplexer , computer science , encoder , nand logic , operand , cmos , power–delay product , electronic engineering , domino logic , propagation delay , logic gate , logic synthesis , adder , nand gate , logic family , electrical engineering , computer hardware , engineering , multiplexing , voltage , operating system
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