Open AccessManifestation of the channeling effect when manufacturing JFET transistors
Author(s) -
V. G. Verbitskiy,
S. V. Voevodin,
V.V. Fedulov,
G.V. Kalistyi,
D.O. Verbitskiy
Publication year - 2020
Publication title -
semiconductor physics, quantum electronics and optoelectronics/semiconductor physics quantum electronics and optoelectronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.185
H-Index - 2
eISSN - 1605-6582
pISSN - 1560-8034
DOI - 10.15407/spqeo23.04.379
Subject(s) - jfet , saturation current , materials science , cmos , transistor , optoelectronics , wafer , common emitter , bipolar junction transistor , electrical engineering , saturation (graph theory) , field effect transistor , electronic engineering , voltage , engineering , mathematics , combinatorics
TThe proposed work covers the tasks of such areas as reducing input currents and bias voltage of integrated operational amplifiers (ICs OA) manufactured according to BiFET technology, the prospect of using JFET transistors in digital circuit technology, Si CMOS technology at 22 nm node and beyond, manufacturing bipolar transistors on ultra-thin layers of the active base and emitter, increasing resistance of ICs to external influences. The main method of experimental investigation of channeling is the construction of impurity distribution profiles using SIMS. In this work to study the channeling effect of boron and phosphorus in silicon was chosen the method for constructing the response surface of the saturation current of JFET for a silicon wafer. The choice of method was based on the high sensitivity of the cut-off voltage and saturation current of the JFET transistor to the channel thickness and impurity concentration in it, the relative simplicity of performance and practical benefits in improving BiFET technology.