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Design, Analysis, and Simulation of a Jitter Reduction Circuit (JRC) System at 1GHz
Author(s) -
RUN BIN YU
Publication year - 2016
Language(s) - English
Resource type - Dissertations/theses
DOI - 10.15368/theses.2016.164
Subject(s) - jitter , computer science , clock signal , reduction (mathematics) , signal (programming language) , heartbeat , clock skew , electronic engineering , process (computing) , signal edge , real time computing , engineering , computer hardware , digital signal processing , telecommunications , analog signal , computer network , mathematics , geometry , programming language , operating system

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