z-logo
open-access-imgOpen Access
Implementation Study Of Field Programmable Gate Array (FPGA) And Complex Programmable Logic Device (CPLD) In Collision Avoidance System Using Vhsic Hardware Description Language (VHDL)
Author(s) -
Mohammad Naqiuddin Fahmi Fathli,
Zulkifli Md. Yusof
Publication year - 2021
Publication title -
mekatronika : journal of intelligent manufacturing and mechatronics
Language(s) - English
Resource type - Journals
ISSN - 2637-0883
DOI - 10.15282/mekatronika.v3i1.7152
Subject(s) - vhdl , complex programmable logic device , field programmable gate array , embedded system , collision avoidance , gate array , computer science , hardware description language , microcontroller , programmable logic device , collision , collision avoidance system , computer hardware , computer security
A collision avoidance system, also known as a pre-crash system, forward collision warning system, or collision mitigation system, is a sophisticated driver-assistance system that aims to avoid or mitigate the severity of a collision. For this research, collision avoidance system will be fabricating to show that this system can detect avoidance range before apply the braking action to prevent collision. The ultrasonic sensor will be used in this system to detect the avoidance range. In this collision avoidance system, there will be uses of Field Programmable Gate Array (FPGA) and Complex Programmable Logic Device (CPLD). This research will observe how to implement FPGA and CPLD in the collision avoidance system using VHSIC Hardware Description Language (VHDL). The VHDL will be done in Quartus II 15.0 Software. In this research, Terasic DE-10 Standard board has been used. It contains FPGA microcontroller model Cyclone V SoC 5CSXFC6D6F31C6N. Max II board is used because it contains CPLD microcontroller model EPM240T100C5.

The content you want is available to Zendy users.

Already have an account? Click here to sign in.
Having issues? You can contact us here