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Multi-bit Error Correction Technique for NTC based Network on Chip
Publication year - 2018
Language(s) - English
Resource type - Conference proceedings
DOI - 10.15242/heaig.e1217006
Subject(s) - computer science , bit (key) , error detection and correction , chip , bit error rate , system on a chip , electronic engineering , algorithm , computer network , embedded system , telecommunications , engineering , decoding methods

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