
Efficient algorithm design on hybrid CPU-FPGA architecture for high performance computing
Author(s) -
Jean Shilpa,
P.K. Jawahar
Publication year - 2021
Publication title -
international journal of systems, control and communications
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.174
H-Index - 13
eISSN - 1755-9359
pISSN - 1755-9340
DOI - 10.1504/ijscc.2021.113239
Subject(s) - computer science , field programmable gate array , embedded system , parallel computing , scheduling (production processes) , software , multi core processor , computation , symmetric multiprocessor system , performance improvement , computer architecture , algorithm , operating system , engineering , operations management