Open AccessDesign of High Speed and Low Power Multiplier using Dual-Mode Square Adder
Author(s) -
Naresh K. Darimireddy,
B. Jaya Lakshmi,
R. Ramana Reddy
Publication year - 2019
Publication title -
international journal of circuits and architecture design
Language(s) - English
Resource type - Journals
eISSN - 2051-7033
pISSN - 2051-7025
DOI - 10.1504/ijcad.2019.10024523
Subject(s) - adder , square (algebra) , multiplier (economics) , dual mode , power (physics) , dual (grammatical number) , computer science , arithmetic , electronic engineering , mathematics , electrical engineering , physics , engineering , cmos , art , geometry , literature , quantum mechanics , economics , macroeconomics