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FPGA Implementation of Optimized BIST Architecture for Testing of Logic Circuits
Author(s) -
R Ramya,
R Madhura
Publication year - 2020
Publication title -
ssrg international journal of vlsi and signal processing
Language(s) - English
Resource type - Journals
ISSN - 2394-2584
DOI - 10.14445/23942584/ijvsp-v7i2p106
Subject(s) - field programmable gate array , computer science , computer architecture , embedded system , architecture , built in self test , electronic circuit , computer hardware , engineering , electrical engineering , art , visual arts

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