
Des IGN of Inexact Circuits using Gate-Level Pruning
Author(s) -
Thilagavathy M. S,
S. Gopalakrishnan
Publication year - 2017
Publication title -
ssrg international journal of electronics and communication engineering
Language(s) - Uncategorized
Resource type - Journals
eISSN - 2349-9184
pISSN - 2348-8549
DOI - 10.14445/23488549/ijece-v4i12p101
Subject(s) - pruning , computer science , electronic circuit , electrical engineering , engineering , biology , horticulture