
Implementation of SAD Algorithm with Folded Tree Architecture using VHDL
Author(s) -
S Resma,
Ragi mol
Publication year - 2015
Publication title -
ssrg international journal of electronics and communication engineering
Language(s) - English
Resource type - Journals
eISSN - 2349-9184
pISSN - 2348-8549
DOI - 10.14445/23488549/ijece-v2i7p107
Subject(s) - vhdl , computer science , architecture , algorithm , tree (set theory) , computer architecture , parallel computing , mathematics , computer hardware , field programmable gate array , combinatorics , art , visual arts