
Realization of BIST Architecture using SRAM Cell Based on Input Vector Monitoring
Author(s) -
S Miruthubashini,
K.G.S. Venkatesan,
T Kirubakaran
Publication year - 2015
Publication title -
ssrg international journal of electronics and communication engineering
Language(s) - English
Resource type - Journals
eISSN - 2349-9184
pISSN - 2348-8549
DOI - 10.14445/23488549/ijece-v2i4p114
Subject(s) - realization (probability) , architecture , computer science , static random access memory , embedded system , computer architecture , computer hardware , mathematics , statistics , geography , archaeology