Open AccessImplementation of A DRAM 4×4 (Dynamic Random Access Memory) With Self Controllable Voltage Level (SVL) Technique
Author(s) -
S. M. Sameer,
Sanjeeva Rao K
Publication year - 2014
Publication title -
ssrg international journal of electronics and communication engineering
Language(s) - English
Resource type - Journals
eISSN - 2349-9184
pISSN - 2348-8549
DOI - 10.14445/23488549/ijece-v1i10p108
Subject(s) - dram , dynamic random access memory , random access memory , voltage , static random access memory , computer science , computer hardware , semiconductor memory , electrical engineering , engineering