
Area Efficient Carry Select Adder with Low Power
Author(s) -
S. Balaprasad,
M. Jeyalakshmi
Publication year - 2015
Publication title -
ssrg international journal of electrical and electronics engineering
Language(s) - English
Resource type - Journals
eISSN - 2349-9176
pISSN - 2348-8379
DOI - 10.14445/23488379/ijeee-v2i2p101
Subject(s) - adder , carry (investment) , computer science , arithmetic , carry save adder , power (physics) , serial binary adder , computer hardware , mathematics , telecommunications , physics , finance , quantum mechanics , economics , latency (audio)