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Implementation of fast FFT design for 128-point using Radix-22 CFA
Author(s) -
Manish Bansal,
Sangeeta Nakhate
Publication year - 2018
Publication title -
international journal of engineering and technology
Language(s) - English
Resource type - Journals
ISSN - 2227-524X
DOI - 10.14419/ijet.v7i4.16063
Subject(s) - modelsim , vhdl , field programmable gate array , computer science , fast fourier transform , matlab , virtex , twiddle factor , radix (gastropod) , code (set theory) , parallel computing , computer hardware , arithmetic , algorithm , mathematics , programming language , fourier analysis , mathematical analysis , botany , set (abstract data type) , short time fourier transform , fourier transform , biology
In this paper, implementation of fast FFT design for 128- point using Radix-22 CFA is presented. This research uses a common factor algorithm which is based on Radix-22. A 2-point DFT butterfly structure is the lowest complexity structure and Radix-22 CFA is used to reduce logic and area by reducing the number of twiddle factors. The VHDL code is written and synthesized using Xilinx FPGA device xc7vx330t-3ffg1761 to implement the proposed design. This design is coded in VHDL and MATLAB. VHDL code is targeted to synthesize into Xilinx Virtex-7 FPGA and simulated into ModelSim PE Student Edition 10.4a. MATLAB code is simulated into MATLAB 2012. The proposed design achieves 149.822 MHz clock frequency, used 2802 slices on the Virtex-7 and SQNR 33.49 dB at 16-bit I/O word length. 

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