Open AccessA Ultra Low Power 12 Bit Successive Approximation Register for Bio-Medical Applications
Author(s) -
Manoj Kumar,
Raj Kumar
Publication year - 2018
Publication title -
international journal of engineering and technology
Language(s) - English
Resource type - Journals
ISSN - 2227-524X
DOI - 10.14419/ijet.v7i3.4.16192
Subject(s) - clock gating , successive approximation adc , converters , power (physics) , computer science , power consumption , dynamic demand , clock domain crossing , electronic engineering , electronic circuit , electrical engineering , clock skew , clock signal , voltage , synchronous circuit , engineering , comparator , physics , quantum mechanics
Successive Approximation Register (SAR) analog to digital Converters (ADC) is favorable choice for the high resolution. As resolution of ADC increases, the no. of redundant cycles increases which increases power. So the Paper presents clock gated ADC with no redundant cycles/transition cycles for low power requirement and comparison between without Clock Gating and Clock Gated SAR. Using Simulation, Power consumption for Clock gated SAR 736.1nW at 1.8V power supply where as without Clock Gating SAR consumption is 54µW at 1.8 power supply.