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A Brief Review for Semiconductor Memory Testing Based on BIST Techniques
Author(s) -
gthombam Imocha Singh,
Prashant V. Joshi
Publication year - 2018
Publication title -
international journal of engineering and technology
Language(s) - English
Resource type - Journals
ISSN - 2227-524X
DOI - 10.14419/ijet.v7i3.1.16807
Subject(s) - computer science , reliability engineering , semiconductor memory , overhead (engineering) , scope (computer science) , flash memory , embedded system , built in self test , test strategy , computer hardware , engineering , operating system , programming language , software
With rapid growth of semiconductor industry and increase in complexity of semiconductor based memory, necessity of stringent testing methodology has become one of top most criteria for memory evaluation. This paper describes the fundamental concepts and overview of Built-In-Self-Test (BIST). It describes different functional faults modeling of RAM and flash memory. This review mentions about testing approaches for memory and illustrates BIST techniques for finding faults, power dissipation, area overhead and test time during testing, also includes research gap and future scope regarding the testing of memory.  

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