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Area, power and delay efficient 2-bit magnitude comparator using modified gdi technique in tanner 180nm technology
Author(s) -
Kakarla Hari Kishore,
K DurgaKoteswara Rao,
G Manvith,
K Biswanth,
P Alekhya
Publication year - 2018
Publication title -
international journal of engineering and technology
Language(s) - English
Resource type - Journals
ISSN - 2227-524X
DOI - 10.14419/ijet.v7i2.8.10413
Subject(s) - comparator , very large scale integration , cmos , computer science , chip , transistor , electronic circuit , electronic engineering , power (physics) , electrical engineering , embedded system , engineering , telecommunications , physics , voltage , quantum mechanics

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