Open AccessFPGA implementation of power on self-test towards combo card
Author(s) -
R. Srivel,
R. P. Singh,
D. Arokiaraj
Publication year - 2018
Publication title -
international journal of engineering and technology
Language(s) - English
Resource type - Journals
ISSN - 2227-524X
DOI - 10.14419/ijet.v7i2.32.15586
Subject(s) - field programmable gate array , computer science , embedded system , sync , computer hardware , reset (finance) , vhdl , router , telecommunications , computer network , frame (networking) , financial economics , economics
The Combo Card is a legacy trunk and subscriber card which provides loop dialing, MAGNETO, FXS, FXO, E&M and SHDSL two wire ports. The Purpose of this Card is to Facilitate Voice and Data Services for the User in Small Deployment. This Module is going to be plugged into Line Card V3 and used in TDM Router. As an FPGA Engineers, Our main Focus is on FPGA part on this SERVICES CARD. We are Using Spartan-6 FPGA in this Project. The Name COMBO CARD isCame into Existence as we are Combining Many Interfaces viz., FXS, FXO, LD, E & M, Magneto, and SHDSL. In this study We are Dealing With Respect to FPGA by Using VHDL and Generating Clock and Sync Pulse 8.192 M Hz Generation for FXO and FXS, SHDSL Control Pin Mapping, Power on Self-Test With Respect to Clock Monitor and Generation of Reset Pulse 300us For all the Devices Connected to FPGA, So, that the Title FPGA Implementation of Power on Self-Test On Services Card Justifies.