Open AccessDA Based Systematic Approach Using Speculative Addition for High Speed DSP Applications
Author(s) -
G. Reddy Hemantha,
Srivatsan Varadarajan,
M. N. Giriprasad
Publication year - 2018
Publication title -
international journal of engineering and technology
Language(s) - English
Resource type - Journals
ISSN - 2227-524X
DOI - 10.14419/ijet.v7i2.24.12030
Subject(s) - adder , computer science , parallel computing , carry save adder , latency (audio) , network topology , arithmetic , field programmable gate array , serial binary adder , digital signal processing , computer hardware , topology (electrical circuits) , mathematics , computer network , telecommunications , combinatorics
In recent years Parallel-prefix topologies has been emerged to offer a high-speed solution for many DSP applications. Here in this paper carrier approximation is introduced to incorporate speculation in Han Carlson prefix method. And overall latency is considerably reduced using single Brent-Kung addition as a pre and post processing unit. In order to improve the reliability error detection network is combined with the approximated adder and it is assert the error correction unit whenever speculation fails during carries propagation from LSB segment to MSB unit. The proposed speculative adder based on Han-Carlson parallel-prefix topology attains better latency reduction than variable latency Kogge-Stone topology. Finally, multiplier-accumulation unit (MAC) is designed using serial shift-based accumulation where the proposed speculative adder is used for partial product addition iteratively. The performance merits and latency reduction of proposed adder unit is proved through FPGA hardware synthesis. Obtained results show that proposed MAC unit outperforms both previously proposed speculative architectures and all other high-speed multiplication methods.