
VLSI Design flow for Secure Integrated Circuits based on DES, TDES, AES and Blowfish Algorithms and their performance
Author(s) -
Kumara Swamy Varkuti,
Prabhu G Benakop
Publication year - 2018
Publication title -
international journal of engineering and technology
Language(s) - English
Resource type - Journals
ISSN - 2227-524X
DOI - 10.14419/ijet.v7i2.16.11424
Subject(s) - advanced encryption standard , modelsim , computer science , encryption , embedded system , throughput , verilog , very large scale integration , computer hardware , computer network , field programmable gate array , wireless , operating system , vhdl
Information Communication Technology (ICT) and Information Security (IS) are playing vital role in the present day communications. Information is prone to side channel attacks at software level where as it is very difficult to hack the information at hardware level. Security is the major concern in the paperless communication and cashless online transactions. This paper aims to implement the most secured Improved Modified Blowfish Algorithm (IMBFA) by incorporating cell substitution using Wave Dynamic Differential Logic (WDDL) and interconnect decomposition in the VLSI Design flow to not to allow the hacker to estimate or predict the key. Proposed IMBFA which can result in high speed, high throughput and effective memory utilization compared to Data Encryption Standard (DES), Triple Data Encryption Standard (TDES), Advanced Encryption Standard (AES) and Blowfish (BF). In this research paper, IMBFA yielded minimum delay as 71.067 ns, frequency of the design as 14.07 MHz, memory utilization as 62.481MB and throughput is 900Mbps compared to AES, TDES and DES algorithms. It is simulated using ModelSim, Synthesized using Leonardo Spectrum and implemented using Verilog HDL.