Open AccessEfficient and high speed key-independent AES-based authenticated encryption architecture using FPGAs
Author(s) -
A. Murali,
K. Hari Kishore
Publication year - 2017
Publication title -
international journal of engineering and technology
Language(s) - English
Resource type - Journals
ISSN - 2227-524X
DOI - 10.14419/ijet.v7i1.5.9152
Subject(s) - computer science , field programmable gate array , encryption , cryptography , block cipher , embedded system , hash function , key (lock) , implementation , authentication (law) , computer network , computer security , programming language
Data manipulations are made with the use of communication and networking systems. But at the same time, data integrity is also a needed and important property that must be maintained in every data communicating systems. For this, the security levels are provided with cryptographic primitives like hash functions and block ciphers which are deployed into the systems. For efficient architectures, FPGA-based systems like AES-GCM and AEGIS-128 plays in the best part of the re-configurability, which supports the security services of such communication and networking systems. We possibly focus on the performance of the systems with the high security of the FPGA bit streams. GF (2128) multiplier is implemented for authentication tasks for high-speed targets. And also, the implementations were evaluated by using vertex 4.5 FPGA’s