Open AccessDesign of low power 10GS/s 6-Bit DAC using CMOS technology
Author(s) -
P. Ramakrishna,
K. Hari Kishore
Publication year - 2017
Publication title -
international journal of engineering and technology
Language(s) - English
Resource type - Journals
ISSN - 2227-524X
DOI - 10.14419/ijet.v7i1.5.9151
Subject(s) - nmos logic , pmos logic , cmos , electrical engineering , resistor , electronic engineering , 12 bit , power (physics) , 8 bit , ultra low power , converters , mosfet , transistor , low voltage , computer science , voltage , engineering , physics , power consumption , quantum mechanics
A Low power 6-bit R-2R ladder Digital to Analog Converter is presented in this paper. Here the R-2 R network designed using resistors with only two values-R and 2xRand the switch is designed by using both NMOS and PMOS Transistors. This Digital to Analog Converters operated with low voltage, by applying dynamic threshold MOSFET (DTMOS) logic. This design achieved less INL and DNL which is 0.3 and 0.06 respectively. Power supply required to operate this device is only 1V with10GHzconversion rate. This design is implemented by using 0.18μm CMOS technology.