Open AccessA 2.4 GHz low noise amplifier design at 130nm CMOS technology using common gate topology for WiFi / WiMAX application
Author(s) -
M. Ramana Reddy,
N.S Murthy Sharma,
P. Chandra Sekhar
Publication year - 2017
Publication title -
international journal of engineering and technology
Language(s) - English
Resource type - Journals
ISSN - 2227-524X
DOI - 10.14419/ijet.v7i1.3.9270
Subject(s) - cmos , common gate , noise figure , low noise amplifier , electronic engineering , amplifier , electrical engineering , topology (electrical circuits) , noise (video) , chip , engineering , computer science , artificial intelligence , image (mathematics)
The proposed work shows an innovative designing in TSMC 130nm CMOS technology. A 2.4 GHz common gate topology low noise amplifier (LNA) using an active inductor to attain the low power consumption and to get the small chip size in layout design. By using this Common gate topology achieves the noise figure of 4dB, Forward gain (S21) parameter of 14.7dB, and the small chip size of 0.26 mm, while 0.8mW power consuming from a 1.1V in 130nm CMOS gives the better noise figure and improved the overall performance.