Open AccessLow Power and High Speed D-Latch Circuit Designs Based on Carbon Nanotube FET
Author(s) -
Neda Talebipoor,
Peiman Keshavarzian,
Behzad Irannejad
Publication year - 2012
Publication title -
international journal of engineering and technology
Language(s) - English
Resource type - Journals
ISSN - 2227-524X
DOI - 10.14419/ijet.v2i1.483
Subject(s) - carbon nanotube field effect transistor , power–delay product , electronic circuit , carbon nanotube , power (physics) , transistor , power consumption , electrical engineering , flip flop , circuit design , voltage , electronic engineering , field effect transistor , computer science , materials science , engineering , nanotechnology , cmos , physics , quantum mechanics
In this paper we propose low power and high speed D-latche circuits base on carbon nanotube field effect transistor. D-latches are the important state-holding elements and systems performance enhancement will be achieved by improving the flip-flop latches structure. The circuit designs are simulated by Hspice .In this paper the consumption result of the circuit parameters such as delay, power and PDP for our three different D-latch circuit design in various voltages and different temperatures.