
Study of SRAM Standby Leakage Reduction Techniques for Deep-submicron CMOS Technology
Author(s) -
Satyendra Kumar,
Kaushik Saha,
Harsh Gupta
Publication year - 2017
Publication title -
international journal of control and automation
Language(s) - English
Resource type - Journals
eISSN - 2207-6387
pISSN - 2005-4297
DOI - 10.14257/ijca.2017.10.10.05
Subject(s) - leakage (economics) , static random access memory , cmos , standby power , reduction (mathematics) , embedded system , computer science , electronic engineering , electrical engineering , engineering , voltage , mathematics , geometry , economics , macroeconomics