Open AccessAn area efficient and high throughput implementation of layered min-sum iterative construction a posteriori probability LDPC decoder
Author(s) -
Hasnain Raza,
Syed Azhar Ali Zaidi,
Aamir Rashid,
Shafiq Haider
Publication year - 2021
Publication title -
plos one
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.99
H-Index - 332
ISSN - 1932-6203
DOI - 10.1371/journal.pone.0249269
Subject(s) - low density parity check code , computer science , throughput , decoding methods , soft decision decoder , scheduling (production processes) , parallel computing , maximum a posteriori estimation , algorithm , coding gain , error detection and correction , mathematics , maximum likelihood , statistics , telecommunications , wireless , mathematical optimization
Area efficient and high speed forward error correcting codes decoder are the demand of many high speed next generation communication standards. This paper explores a low complexity decoding algorithm of low density parity check codes, called the min-sum iterative construction a posteriori probability (MS-IC-APP), for this purpose. We performed the error performance analysis of MS-IC-APP for a (648,1296) regular QC-LDPC code and proposed an area and throughput optimized hardware implementation of MS-IC-APP. We proposed to use the layered scheduling of MS-IC-APP and performed other optimizations at architecture level to reduce the area and to increase the throughput of the decoder. Synthesis results show 6.95 times less area and 4 times high throughput as compared to the standard min-sum decoder. The area and throughput are also comparable to the improved variants of hard-decision bit-flipping (BF) decoders, whereas, the simulation results show a coding gain of 2.5 over the best implementation of BF decoder in terms of error performance.