Open Access400 Gb/s O-band silicon photonic transmitter for intra-datacenter optical interconnects
Author(s) -
Eslam El-Fiky,
Alireza Samani,
David Patel,
Maxime Jacques,
Mohammed Sowailem,
David V. Plant
Publication year - 2019
Publication title -
optics express
Language(s) - Uncategorized
Resource type - Journals
SCImago Journal Rank - 1.394
H-Index - 271
ISSN - 1094-4087
DOI - 10.1364/oe.27.010258
Subject(s) - transmitter , bit error rate , optics , bandwidth (computing) , forward error correction , physics , photonics , optoelectronics , electronic engineering , materials science , computer science , telecommunications , channel (broadcasting) , engineering , decoding methods
We present and experimentally demonstrate a silicon photonic (SiP)-based four-lane 400 Gb/s transmitter for fiber-rich intra-datacenter optical interconnects. Four parallel SiP series push-pull traveling wave Mach-Zehnder modulators (MZMs) operating in the O-band are used in the transmitter. The MZMs have an average electro-optic (EO) bandwidth of approximately 30 GHz at 3 V reverse bias voltage. To assess the parallel operation, we measure the EO crosstalk between the four MZMs, where the EO crosstalk between the closest MZMs is below -17 dB over 50 GHz bandwidth. Then, we use a four-channel digital-to-analog converter (DAC) to simultaneously drive the MZMs and characterize the performance of the transmitter versus various parameters. Results reveal that 53 Gbaud pulse amplitude modulation over 4-levels (PAM4), i.e., 100 Gb/s net rate, per lane can be received at a bit error rate (BER) below the KP4- forward error correction (KP4-FEC) threshold of 2.4×10 -4 using only a 5-tap feed-forward equalizer (FFE) at the receiver. In addition, we show that 53 Gbaud and 64 Gbaud PAM4 per lane can be received at a BER below the KP4-FEC and 7% hard decision FEC (HD-FEC), respectively, using a driving voltage swing below 1.8 Vpp. To the best of our knowledge, these are the best results for 100 Gb/s PAM4 using a single electrode SiP TWMZM with a lateral PN junction in a multi-project wafer process. Finally, we show that the BER is still below the KP4-FEC at maximum crosstalk for all lanes, and an aggregate rate of 400 Gb/s can be achieved at an average BER of approximately 1×10 -4 .