z-logo
open-access-imgOpen Access
High-speed FPGA-based phase measuring profilometry architecture
Author(s) -
Guomin Zhan,
Hongwei Tang,
Kai Zhong,
Zhongwei Li,
Yusheng Shi,
Congjun Wang
Publication year - 2017
Publication title -
optics express
Language(s) - Uncategorized
Resource type - Journals
SCImago Journal Rank - 1.394
H-Index - 271
ISSN - 1094-4087
DOI - 10.1364/oe.25.010553
Subject(s) - field programmable gate array , computer science , pipeline (software) , profilometer , phase (matter) , architecture , computer hardware , materials science , physics , art , visual arts , quantum mechanics , surface roughness , composite material , programming language
This paper proposes a high-speed FPGA architecture for the phase measuring profilometry (PMP) algorithm. The whole PMP algorithm is designed and implemented based on the principle of full-pipeline and parallelism. The results show that the accuracy of the FPGA system is comparable with those of current top-performing software implementations. The FPGA system achieves 3D sharp reconstruction using 12 phase-shifting images and completes in 21 ms with 1024 × 768 pixel resolution. To the best of our knowledge, this is the first fully pipelined architecture for PMP systems, and this makes the PMP system very suitable for high-speed embedded 3D shape measurement applications.

The content you want is available to Zendy users.

Already have an account? Click here to sign in.
Having issues? You can contact us here