
Development of a Simple Verification Environment Using FPGA for image processing Hardware Created by High-Level-Synthesis Using TCP/IP
Author(s) -
Atsushi Shojima,
Akira Yamawaki
Publication year - 2021
Language(s) - English
Resource type - Conference proceedings
DOI - 10.12792/icisip2021.038
Subject(s) - field programmable gate array , computer science , simple (philosophy) , embedded system , high level synthesis , computer hardware , image processing , image (mathematics) , artificial intelligence , philosophy , epistemology