Open AccessEfficient reconfigurable architecture for moving object detection with motion compensation
Author(s) -
N. Sridevi,
M. Meenakshi
Publication year - 2021
Publication title -
indonesian journal of electrical engineering and computer science
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.241
H-Index - 17
eISSN - 2502-4760
pISSN - 2502-4752
DOI - 10.11591/ijeecs.v23.i2.pp802-810
Subject(s) - adder , computer science , field programmable gate array , comparator , motion compensation , compensation (psychology) , computer hardware , block (permutation group theory) , synchronization (alternating current) , generator (circuit theory) , real time computing , power (physics) , artificial intelligence , engineering , mathematics , channel (broadcasting) , geometry , psychology , telecommunications , computer network , physics , quantum mechanics , voltage , psychoanalysis , electrical engineering , latency (audio)
The detection and tracking of object in large data surveillance requires a proper motion estimation and compensation techniques which are generally used to detect accurate movement from video stream. In this paper, a novel hardware level architecture involving motion detection, estimation, and compensation is proposed for real-time implementation. The motion vectors are obtained using 16×16 sub-blocks with a novel parallel D flip flop architecture in this work to arrive at an optimised architecture. The sum of absolute difference (SAD) is then calculated by optimized absolute difference and adder blocks designed using kogge-stone adder which helps in improving the speed of the architecture. The controller block is designed by finite state machine model used for synchronization of all the operations. Further, the comparator and compensation blocks are optimized by using basic logical elements and the Kogge-stone adder. Finally, the proposed architecture is implemented on Zynq Z7-10 field-programmable gate array (FPGA) and simulated using System Generator tool for real time traffic signal. The hardware and software parameters are compared with the existing techniques which shows that the proposed architecture is efficient than existing methods of design.