Open AccessCapacitance study of integrated circuits matrix interconnects
Author(s) -
Ahcene Lakhlef,
A. Benfdila,
Lounas Belhimer
Publication year - 2021
Publication title -
indonesian journal of electrical engineering and computer science
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.241
H-Index - 17
eISSN - 2502-4760
pISSN - 2502-4752
DOI - 10.11591/ijeecs.v22.i2.pp1156-1164
Subject(s) - microstrip , capacitance , conductor , inductance , electronic engineering , electrical conductor , admittance parameters , interconnection , electrical engineering , topology (electrical circuits) , engineering , materials science , physics , voltage , telecommunications , electrode , quantum mechanics , composite material
Propagation delays and couplings between nearby lines affect the circuit performances (speed, power consumption) and operations. Propagation delays in longer lines can become critical compared to the clock frequency and can induce unwanted signals in neighboring lines ("crosstalk" phenomenon). Induced line capacitances can induce parasitic signals. Hence characterizing of these capacitances is of paramount importance. The present work deals with the analysis of capacitance of a multilayer conductor interconnect aiming for their possible exact extraction. We used three topologies of a microstrip conductor interconnects and identified the potential distributor and then computed the capacitance and inductance matrix using a finite element method. The first analysis dealt with parallel microstrip conductors and the second with two levels (plan) of a microstrip conductors the results are compared to those obtained by other methods and found quite encouraging.