Open AccessEfficient TCAM design based on dual port SRAM on FPGA
Author(s) -
Nguyen Thanh Triet,
Kim-Son Ngo,
Nguyen Trinh,
Bao Bui,
Linh Tran,
Trang Hoang
Publication year - 2021
Publication title -
indonesian journal of electrical engineering and computer science
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.241
H-Index - 17
eISSN - 2502-4760
pISSN - 2502-4752
DOI - 10.11591/ijeecs.v22.i1.pp104-112
Subject(s) - content addressable memory , static random access memory , computer science , field programmable gate array , computer hardware , embedded system , memory map , semiconductor memory , memory refresh , computer memory , artificial neural network , machine learning
Ternary content addressable memory (TCAM) is a memory that allows high speed searching for data. Not only it is acknowledged as associative memory/storage but also TCAM can compare input searching content (key) against a collection of accumulated data and return the matching address which compatible with this input search data. SRAM-based TCAM utilizes and allocates blocks RAM to perform application of TCAM on FPGA hardware. This paper presents a design of 480×104 bit SRAM-based TCAM on altera cyclone IV FPGA. Our design achieved lookup rate over 150 millions input search data and update speed at 75 million rules per second. The architecture is configurable, allowing various performance trade-offs to be exploited for different ruleset characteristics .