Open AccessDesign of 130nm RFCMOS differential low noise amplifier
Author(s) -
Mohd Razali Muhamad,
Hanim Hussin,
Norhayati Soin
Publication year - 2020
Publication title -
indonesian journal of electrical engineering and computer science
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.241
H-Index - 17
eISSN - 2502-4760
pISSN - 2502-4752
DOI - 10.11591/ijeecs.v19.i1.pp172-177
Subject(s) - low noise amplifier , electrical engineering , noise figure , amplifier , cmos , differential amplifier , noise (video) , fully differential amplifier , direct coupled amplifier , effective input noise temperature , physics , noise temperature , electronic engineering , topology (electrical circuits) , engineering , optoelectronics , computer science , operational amplifier , phase noise , artificial intelligence , image (mathematics)
In this paper, an inductively degenerated CMOS differential low noise amplifier circuit topology is presented. This low noise amplifier is intended to be used for wireless LAN application. The differential low noise amplifier proposed provide high gain, low noise and large superior out of band IIP3. The LNA is designed in 130 nm CMOS technology. Simulated results of gain and NF at 2.4GHz are 20.46 dB and 2.59 dB, respectively. While the simulated S 11 and S 22 are −11.18 dB and −9.49 dB, respectively. The IIP3 is −9.05 dBm. The LNA consumes 3.4 mW power from 1.2V supply.