Open AccessBlack Box Model based Self Healing Solution for Stuck at Faults in Digital Circuits
Author(s) -
S. Meyyappan,
V. Alamelumangai
Publication year - 2017
Publication title -
international journal of electrical and computer engineering
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.277
H-Index - 22
ISSN - 2088-8708
DOI - 10.11591/ijece.v7i5.pp2451-2458
Subject(s) - modelsim , redundancy (engineering) , computer science , triple modular redundancy , combinational logic , digital electronics , overhead (engineering) , embedded system , modular design , interconnection , fault (geology) , electronic circuit , computer hardware , logic gate , algorithm , field programmable gate array , engineering , electrical engineering , seismology , geology , vhdl , operating system , computer network
The paper proposes a design strategy to retain the true nature of the output in the event of occurrence of stuck at faults at the interconnect levels of digital circuits. The procedure endeavours to design a combinational architecture which includes attributes to identify stuck at faults present in the intermediate lines and involves a healing mechanism to redress the same. The simulated fault injection procedure introduces both single as well as multiple stuck-at faults at the interconnect levels of a two level combinational circuit in accordance with the directives of a control signal. The inherent heal facility attached to the formulation enables to reach out the fault free output even in the presence of faults. The Modelsim based simulation results obtained for the Circuit Under Test [CUT] implemented using a Read Only Memory [ROM], proclaim the ability of the system to survive itself from the influence of faults. The comparison made with the traditional Triple Modular Redundancy [TMR] exhibits the superiority of the scheme in terms of fault coverage and area overhead.