Open AccessFace recognition using assemble of low frequency of DCT features
Author(s) -
Raja Abdullah Raja Ahmad,
Muhammad Ahmad,
Mohd Nazrin Md Isa,
Said Amirul Anwar
Publication year - 2019
Publication title -
bulletin of electrical engineering and informatics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 12
ISSN - 2302-9285
DOI - 10.11591/eei.v8i2.1417
Subject(s) - computer science , facial recognition system , artificial intelligence , discrete cosine transform , feature extraction , pattern recognition (psychology) , feature vector , projection (relational algebra) , feature (linguistics) , face (sociological concept) , linear discriminant analysis , dimension (graph theory) , digital signal processing , frequency domain , euclidean distance , computer vision , algorithm , image (mathematics) , mathematics , computer hardware , social science , linguistics , philosophy , sociology , pure mathematics
Face recognition is a challenge due to facial expression, direction, light, and scale variations. The system requires a suitable algorithm to perform recognition task in order to reduce the system complexity. This paper focuses on a development of a new local feature extraction in frequency domain to reduce dimension of feature space. In the propose method, assemble of DCT coefficients are used to extract important features and reduces the features vector. PCA is performed to further reduce feature dimension by using linear projection of original image. The proposed of assemble low frequency coefficients and features reduction method is able to increase discriminant power in low dimensional feature space. The classification is performed by using the Euclidean distance score between the projection of test and train images. The algorithm is implemented on DSP processor which has the same performance as PC based. The experiment is conducted using ORL standard face databases the best performance achieved by this method is 100%. The execution time to recognize 40 peoples is 0.3313 second when tested using DSP processor. The proposed method has a high degree of recognition accuracy and fast computational time when implemented in embedded platform such as DSP processor.