Open AccessPower analyzer of linear feedback shift register techniques using built in self test
Author(s) -
S. Kannadhasan,
Nagarajan Ramalingam,
Kanagaraj Venusamy,
S. Sathish,
Kiruthiga Balasubramaniyan,
Manjunathan Alagarsamy
Publication year - 2022
Publication title -
bulletin of electrical engineering and informatics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.251
H-Index - 12
ISSN - 2302-9285
DOI - 10.11591/eei.v11i2.3331
Subject(s) - shift register , linear feedback shift register , energy (signal processing) , fault coverage , electronic circuit , built in self test , spectrum analyzer , computer science , power (physics) , automatic test pattern generation , fault (geology) , electronic engineering , computer hardware , embedded system , engineering , mathematics , electrical engineering , statistics , telecommunications , physics , quantum mechanics , seismology , geology
Wasteful patterns that don't lead to fault dropping squander a tone of energy in the linear-feedback shift register and circuit under examination in a random research region. Random switching actions in the CUT and scan pathways between applications with two consecutive vectors are another significant cause of energy loss. This study proposes a unique built-in self-test (BIST) technique for scan-based circuits that might help save energy. Only the available vectors are produced in a fixed series thanks to a mapping logic that alters the LFSR's state transitions. As a consequence, and without reducing fault coverage, the time it takes to execute trials has decreased. Experiments on circuits demonstrated that during random testing, the linear feedback shift register saves a significant amount of power.