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Advanced TCAD Simulation and Calibration of Gallium Oxide Vertical Transistor
Author(s) -
Hiu Yung Wong,
Armand C. Fossito Tenkeu
Publication year - 2020
Publication title -
ecs journal of solid state science and technology
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.488
H-Index - 51
eISSN - 2162-8777
pISSN - 2162-8769
DOI - 10.1149/2162-8777/ab7673
Subject(s) - materials science , transistor , optoelectronics , calibration , threshold voltage , doping , capacitance , channel (broadcasting) , voltage , electrical engineering , physics , electrode , quantum mechanics , engineering
In this paper, advanced β -Ga 2 O 3 TCAD simulation parameters and methodologies are presented by calibrating simulation setup to vertical junctionless multi-gate transistor experimental data. Through careful calibration, several important β -Ga 2 O 3 device physics are identified. The effects of compensation doping and incomplete ionization of dopants are investigated. Electron Philips unified carrier mobility (PhuMob) model, which can capture the temperature effect, is used. We also show that interfacial traps possibly play no role on the non-ideal sub-threshold slope (SS) and short channel effect is the major cause of SS degradation. The breakdown mechanism of the junctionless Ga 2 O 3 transistor is also discussed and is shown to be limited by channel punch-through in off-state. The calibrated models match experimental Capacitance-Voltage (CV) and Current-Voltage (IV) well and can be used to predict the electrical performance of novel β -Ga 2 O 3 devices.

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