Open AccessDirect Electroplating on Indium-Tin-Oxide-Coated Textured and Polished Silicon Substrates via Transition Metal Alloyed Interlayers
Author(s) -
Jochen Politze,
Stefan Scholz,
H. Windgassen,
Christian Schmitz,
Kan Ding,
Weiyuan Duan,
J. Knoch
Publication year - 2022
Publication title -
journal of the electrochemical society
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 1.258
H-Index - 271
eISSN - 1945-7111
pISSN - 0013-4651
DOI - 10.1149/1945-7111/ac690b
Subject(s) - materials science , electroplating , plating (geology) , silicon , layer (electronics) , tin , indium tin oxide , indium , composite material , metal , electrical resistivity and conductivity , metallurgy , stack (abstract data type) , metallizing , oxide , electrical contacts , wafer , optoelectronics , electrical engineering , engineering , geophysics , computer science , programming language , geology
Fe electroplating was used on polished or pyramidally textured indium-tin-oxide (ITO)-coated silicon substrates as an initial layer for subsequent Ni and Cu plating. Up to 15 μm thick Cu layers were deposited on the Ni/Fe intermediate layer. The adhesion strength of this metal layer stack was qualitatively shown using the scotch tape method and quantified by measuring the pull-off stress of the metal stack on ITO. 1.44 and 1.28 MPa was applied to pull off the metal stack from polished and pyramidally textured substrates, respectively. Electrical contact properties were measured by circular transmission line model structures. Very low contact resistivity for electroplated metal on ITO of 6.5E−7 and 9.0E−7 Ωcm2 with transfer lengths of 487 and 720nm are determined for polished and pyramidally textured substrates, respectively.