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An Integrated High-Density Power Management Solution for Portable Applications Based on a Multioutput Switched-Capacitor Circuit
Author(s) -
S. M. Ahsanuzzaman,
Aleksandar Prodic,
David A. Johns
Publication year - 2016
Publication title -
ieee transactions on power electronics
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 2.159
H-Index - 266
eISSN - 1941-0107
pISSN - 0885-8993
DOI - 10.1109/tpel.2015.2474738
Subject(s) - power, energy and industry applications , aerospace , communication, networking and broadcast technologies , components, circuits, devices and systems , computing and processing , engineered materials, dielectrics and plasmas , fields, waves and electromagnetics , general topics for engineers , nuclear engineering , signal processing and analysis , transportation
This paper introduces a novel power management architecture (PMA) and its on-chip implementation, designed for battery-powered portable applications. Compared to the conventional two-stage PMA, consisting of a front-end inductive converter followed by a set of point-of-load buck converters, the presented PMA has drastically improved power density. The new architecture, named multioutput switched-capacitor convertor-differential-input buck (MSC-DB) convertor, is based on a novel hybrid converter topology that combines a fixed ratio MSC and a set of DB converters, to achieve low volume and high power processing efficiency. The front-end switched-capacitor stage has a higher power density than the conventionally used inductive converters. The downstream DB converters enable tight output voltage regulation, and allow for up to four times reduction of output filter inductors without the need for increasing switching frequency, hence limiting switching losses and improving the efficiency of the system. Furthermore, the new PMA is able to balance the state-of-charge of the input battery cells, a feature not existing in conventional systems. The PMA architecture is implemented both as a discrete prototype and as an application-specific integrated circuit (IC) module. The on-chip implemented architecture is fabricated in a standard 0.13-μm CMOS process and operates at 9.3-MHz switching frequency. Experimental comparisons with a conventional two-cell battery input architecture, providing 15 W of total power in three different voltage outputs, demonstrate up to two times reduction in the inductances of the downstream converter stages and more than two times reduction in losses, equivalent to the improvement of the power processing efficiency of a 12%. Moreover, the fabricated IC module is copackaged with low-profile thin-film inductors to demonstrate the effectiveness of the introduced architecture in reducing the volume of PMAs for portable applications.

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