Open AccessDesigning Circuits for AiMC Based On Non-Volatile Memories: A Tutorial Brief On Trade-Offs and Strategies for ADCs and DACs Co-Design
Author(s) -
R. Vignali,
R. Zurla,
M. Pasotti,
P. L. Rolandi,
A. Singh,
M. Le Gallo,
A. Sebastian,
T. Jang,
A. Antolini,
E. Franchi Scarselli,
A. Cabrini
Publication year - 2023
Publication title -
ieee transactions on circuits and systems ii: express briefs
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.799
H-Index - 115
eISSN - 1558-3791
pISSN - 1549-7747
DOI - 10.1109/tcsii.2023.3340112
Subject(s) - components, circuits, devices and systems
Analog In-Memory Computing (AiMC) based on Non-Volatile Memories (NVM) is a promising candidate to reduce latency and power consumption of neural network (NN) inference in edge-computing applications. This kind of computational accelerators allows both storing weights and performing in-situ analog computation inside the array. This tutorial explores trade-offs and strategies in the design of DACs and ADCs for this kind of systems, highlighting the strong interdependence between the two converters. Starting from an analysis of input and weights encoding techniques this tutorial will then propose a discussion aiming at exploring critical aspects that constrain the design of D-A and A-D converters drawing some co-design considerations.