Open AccessThe Stacked Capacitor DRAM Cell and Three-Dimensional Memory
Author(s) -
Mitsumasa Koyanagi
Publication year - 2008
Publication title -
ieee solid-state circuits society newsletter
Language(s) - English
Resource type - Journals
ISSN - 1098-4232
DOI - 10.1109/n-ssc.2008.4785690
Subject(s) - components, circuits, devices and systems , engineered materials, dielectrics and plasmas
The author chronicles the development of the stacked three-dimensional (3D) DRAM cell, highlighting his role in solving the problems of memory data-bandwidth and forecasting a dramatic increase in memory capacity based on his current work using "super-chip" integration technology.
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