
Dimension Effect on Breakdown Voltage of Partial SOI LDMOS
Author(s) -
Yue Hu,
Huazhen Liu,
Qianqian Xu,
Luwen Wang,
Jing Wang,
Shichang Chen,
Peng Zhao,
Ying Wang,
Gaofeng Wang
Publication year - 2017
Publication title -
ieee journal of the electron devices society
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.69
H-Index - 31
ISSN - 2168-6734
DOI - 10.1109/jeds.2017.2690363
Subject(s) - components, circuits, devices and systems , engineered materials, dielectrics and plasmas
Dimension effect on breakdown voltage (BV) of lateral double-diffused metal-oxide- semiconductor field-effect transistor in partial silicon-on-insulator (PSOI) technology is comprehensively studied. The maximum BV (BVmax) is examined under various settings of the device length L and the active silicon film thickness t. It is shown that there exists an optimal pair of (L, t) for PSOI at which the highest BV can be achieved. The ratio of L/t is better chosen between 5 and 7 for the device designs, in particular, L/t = 6 can be considered as the optimal one theoretically. Moreover, impacts of the silicon window length Lw and the drift doping concentration Ndr on the BV, the on-resistance (Ron) and the figure-of-merit (=BV2/Ron) are also carefully studied.