Open Access103.1-dB DR Switched-Resistor Delta-Sigma Modulator With Chopped Negative-R for Suppressing Low-Bandwidth Noise
Author(s) -
Hwaseong Shin,
Quanzhen Duan,
Jaedo Kim,
Sangwook Na,
Jeongjin Roh
Publication year - 2023
Publication title -
ieee access
Language(s) - English
Resource type - Journals
ISSN - 2169-3536
DOI - 10.1109/access.2023.3317975
Subject(s) - aerospace , bioengineering , communication, networking and broadcast technologies , components, circuits, devices and systems , computing and processing , engineered materials, dielectrics and plasmas , engineering profession , fields, waves and electromagnetics , general topics for engineers , geoscience , nuclear engineering , photonics and electrooptics , power, energy and industry applications , robotics and control systems , signal processing and analysis , transportation
This paper presents a high-resolution, low-bandwidth, continuous-time delta-sigma modulator (CTDSM). Although continuous-time integrators are popular for implementing power-efficient DSMs, the coefficient of conventional RC integrators depends on the clock frequency and requires excessively large resistance and capacitance for implementation in low-bandwidth CTDSMs. The high resistance causes thermal noise, limiting the overall performance of the modulator. Accordingly, the CTDSM presented herein incorporates a switched resistor (SR) integrator that overcomes the thermal noise issue and enables high-resolution CTDSM to be used in low-bandwidth applications. The proposed integrator also adopts a chopped negative-R technique to reduce the flicker noise in the amplifier while simultaneously enhancing linearity. The proposed 3rd-order CTDSM is successfully fabricated in a 0.18-μm CMOS process and achieves the following measurement results: a peak signal-to-noise and distortion ratio of 98.8 dB, dynamic range of 103.1 dB, total power consumption of 20.3 μW, and signal bandwidth of 200 Hz.