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A Reliable and Energy-Efficient Nonvolatile Ternary Memory Based on Hybrid FinFET/RRAM Technology
Author(s) -
Aram Yousefi,
Nima Eslami,
Mohammad Hossein Moaiyeri
Publication year - 2022
Publication title -
ieee access
Language(s) - English
Resource type - Journals
SCImago Journal Rank - 0.587
H-Index - 127
ISSN - 2169-3536
DOI - 10.1109/access.2022.3211562
Subject(s) - aerospace , bioengineering , communication, networking and broadcast technologies , components, circuits, devices and systems , computing and processing , engineered materials, dielectrics and plasmas , engineering profession , fields, waves and electromagnetics , general topics for engineers , geoscience , nuclear engineering , photonics and electrooptics , power, energy and industry applications , robotics and control systems , signal processing and analysis , transportation
With the successful development of information technology, particularly in big data and neural network scopes, the appetency for denser memory compositions has exponentially outreached. Accordingly, multi-valued logic has extensively been explored as a promising solution for data storage density enhancement and interconnect complexness declining, integrating with emerging nonvolatile nanodevices. This paper presents a reliable nonvolatile 3-transistor 1-RRAM (3T1R) ternary memory cell and its compact array architecture fulfilled on hybrid RRAM/FinFET logic, in which the cell layout can be densely plugged into the memory array architecture. Comprehensive post-layout simulations based on 7nm FinFET technology have been conducted to assess the proposed design’s functionality, performance, and reliability. Our proposed ternary 3T1R cell has exceptional immunization confronting radiations availing the RRAM radiation immunity and innovative circuit structure. Meanwhile, the RRAM’s engrossing nonvolatile nature induces no static power dissipation in the hold state, certified for low-power applications. Moreover, Monte-Carlo simulation results demonstrate the roughly 20% functional failure of the 1T1R cell’s ternary implementation facing process-voltage-temperature (PVT) variations. However, the proposed design operates robustly in the presence of PVT variations with no functional failure while offering lower delay and energy consumption. Meanwhile, it is also well-designed for addressing the Fin quantization impact of FinFET.

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