Transfer Learning-Based Channel Estimation Supported by FPGA Dynamic Reconfiguration

This paper presents a novel framework for deploying transfer learning (TL) at the network edge using fieldprogrammable gate array (FPGA) partial reconfiguration. While deep learning (DL) algorithms can already be implemented, the flexible and dynamic modification of their architectures has been a constraint for TL fulfillment in the network edge. The proposed framework enables updates of DL architectures while ensuring uninterrupted operation of the core system. To demonstrate the efficacy of the approach, a case study focusing on TL in channel estimation is conducted. The study involves modifying the convolutional neural network (CNN) architecture to accommodate a scenario change. The proposed framework optimizes resource utilization by 20%, approximately, and achieves a reconfiguration process time of 28 ms, approximately. The results highlight the robustness and versatility of the TL-oriented implementation approach in handling dynamic DL architecture modifications.