An Efficiency-Enhanced GaN MMIC Sequential LMBA Using Offset-Line-Based Harmonic Impedance Tuning for 6G FR3 Applications

This letter presents a gallium nitride (GaN) monolithic microwave integrated circuit (MMIC) sequential load-modulated balanced power amplifier (S-LMBA) targeting emerging 6G frequency range 3 (FR3) applications. A novel harmonic load impedance tuning method is proposed, in which the harmonic impedances of the carrier and peaking amplifiers are independently adjusted using offset lines in conjunction with a low-pass-type branch-line coupler. This approach effectively decouples the harmonic and fundamental impedance matching problems. To verify the method, a 14.5-to-15.5-GHz GaN MMIC S-LMBA was designed based on a 120-nm GaN high-electron-mobility transistor (HEMT) process. The fabricated amplifier achieves a saturated output power of 35.2–36.1 dBm, with a corresponding saturated drain efficiency (DE) of 45%–49.7%. At an 8-dB output power back-off (PBO), the DE remains between 28.6% and 31%. Under a 200-MHz 256-QAM modulated signal, the amplifier demonstrates excellent linearity performance after digital predistortion (DPD).