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Fast and Accurate Jitter Modeling for Statistical BER Analysis for Chiplet Interconnect and Beyond
Author(s) -
Shenggao Li,
Maher Amer
Publication year - 2025
Publication title -
ieee journal on emerging and selected topics in circuits and systems
Language(s) - English
Resource type - Magazines
SCImago Journal Rank - 0.868
H-Index - 50
eISSN - 2156-3365
pISSN - 2156-3357
DOI - 10.1109/jetcas.2025.3592902
Subject(s) - components, circuits, devices and systems
In this paper, we investigate Statistical Bit Error Rate (BER) analysis for low-loss short-reach chiplet interface and high-loss long-reach serial interface. We used jitter filtering to account for the residue jitter not tracked by a forwarded clock system and proposed a fast and exact Statistical BER method to account for the Tx jitter amplification effect in a high-loss channel. Our proposed method achieves a linear computation complexity.

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